Overview

State-of-the-art decoders traditionally rely on code-specific algorithms specifically designed for each code type, such as Successive Cancellation for Polar codes and Berlekamp–Massey Algorithm for BCH codes. Despite CRC codes being extensively used for error detection in storage and communication, their potential as error-correcting codes has been overlooked due to the absence of a suitable decoder. Remarkably, all these codes, including heretofore un-decodable ones such as Random Linear Codes (RLCs), can actually be efficiently decoded using a singular universal decoder. The Guessing Random Additive Noise Decoding (GRAND) algorithm, recently unveiled as a universal decoder, excels in accurately decoding moderate redundancy codes. GRAND, being a noise-centric decoding technique, is not tied to a specific codebook, making it inherently future-proof. Our research centers on the creation of energy-efficient, low-power, and high-throughput integrated hardware architectures that leverage the GRAND algorithmic family.

GRAND:

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Collaborators:
Prof. Muriel Médard – MIT EECS, Prof. Ken Duffy – Northeastern University ECE
Funding: NSF SWIFT, DARPA
Team: Vaibhav Bansal (Co-Lead Integrated Circuit Designer), Arslan Riaz (Co-Lead Integrated Circuit Designer), Dr. Furkan Ercan, Amit Solomon (Muriel Medard’s Ph.D. student), Wei An (Muriel Medard’s Ph.D. student), Kevin Galligan (Ken Duffy’s Ph.D. student)

Our group designed the first fully integrated universal Maximum Likelihood decoder in 40 nm CMOS using the GRAND algorithm. Tailored for low-power applications, the GRAND chip stands out as a universal hard-detection decoder that offers reconfigurability to decode diverse moderate redundancy codes, supporting varying code lengths and rates. One of the standout features of the GRAND chip lies in its adaptability, allowing users to dynamically alter the codebook through our code-interleaved architecture. This unique attribute ensures seamless integration across multiple applications without the need for cumbersome switch-over times.

In the pursuit of our research objectives, our scope transcends mere chip development; rather, we are actively engaged in constructing comprehensive communication systems centered around the GRAND chip. This holistic approach encompasses diverse applications, including interleaved noise recycling and efficient decoding of product codes. We have successfully showcased noise recycling for significantly enhancing decoding performance by effectively leveraging temporally correlated noise in a single communication channel, while concurrently optimizing energy and latency. Furthermore, as an extension of our GRAND chip endeavors, we substantiated iterative GRAND (IGRAND)’s efficiency in decoding product codes. This multi-faceted approach underscores our commitment to advancing not only chip technology but also the broader landscape of communication systems and decoding methodologies.

Demos:
  • IEEE ISSCC 2021 SRP [Poster and Demo]
  • IEEE 5G World Forum 2021
  • IEEE Future Networks World Forum 2022
  • CISE Graduate Student Workshop 2022 [Presentation and Demo]
  • IEEE COMSNETS 2022 [Best Research Demo Award]
  • IEEE COMSNETS 2023 [Best Demo Award]

ORBGRAND:

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Collaborators:
Prof. Muriel Médard – MIT EECS, Prof. Ken Duffy – Northeastern University ECE
Funding: NSF SWIFT, DARPA
Team: Arslan Riaz (Lead Designer), Zeynep Ece Kizilates, Alperen Yasar, Dr. Furkan Ercan, Wei An (Muriel Medard’s Ph.D. student), Kevin Galligan (Ken Duffy’s Ph.D. student)

We have demonstrated the first integrated universal soft-detection decoder using the Ordered Reliability Bits Guessing Random Additive Noise Decoding (ORBGRAND) in 40nm CMOS. The ORBGRAND chip uses soft information from each received bit to rank order their reliability, providing guidance for the error guessing query order. This chip, at a target Frame Error Rate (FER) of 10^-7, consumes ultra-low energy of 0.76pJ/bit and low power of 4.9mW with a throughput of 6.5 Gb/s. The record-breaking ORBGRAND chip outperforms other ORBGRAND implementations and existing state-of-the-art code-specific decoders in terms of energy and power consumption.

We have also extended our previous interleaved noise recycling technique demonstrated for a hard-detection scenario to soft-detection decoders using the ORBGRAND chip.

Publications:

Awards:

    • Best Demo Award in IEEE COMSNETS 2023 [Noise Recycling using GRAND]
    • 2nd position for Best Presentations Award at Boston University Center for Information and Systems Engineering (CISE) Graduate Student Workshop 2022 [GRAND]
    • Best Research Demo Award in IEEE COMSNETS 2022 [GRAND]